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general description the MXL1543B is a three-driver/three-receiver multipro-tocol transceiver that operates from a +5v single sup- ply. the MXL1543B, along with the mxl1544/max3175 and the mxl1344a, form a complete software-selec- table data terminal equipment (dte) or data communi- cation equipment (dce) interface port that supports the v.28 (rs-232), v.10/v.11 (rs-449/v.36, eia-530, eia- 530a, x.21), and v.35 protocols. the MXL1543B trans- ceivers carry the high-speed clock and data signals while the mxl1544/max3175 carry the control signals. the MXL1543B can be terminated by the mxl1344a software-selectable resistor termination network or by discrete termination networks. an internal charge pump and a proprietary low-dropout transmitter output stage allow v.11- , v.28- , and v.35- compliant operation from a +5v single supply. a no- cable mode is entered when all mode pins (m0, m1, and m2) are pulled high or left unconnected. in no- cable mode, supply current decreases to 0.5? and all transmitter and receiver outputs are disabled (high impedance). short-circuit current limiting and thermal shutdown circuitry protect the drivers against excessive power dissipation. applications features ? MXL1543B, mxl1544/max3175, and mxl1344achipset is pin compatible with ltc1543, ltc1544, and ltc1344a ? supports rs-232, rs-449, eia-530, eia-530a,v.35, v.36, and x.21 ? software-selectable cable termination using themxl1344a ? complete dte or dce port with mxl1544/max3175, and mxl1344a ? +5v single-supply operation ? 0.5a no-cable mode ? tuv-certified net1/net2 and tbr1/tbr2-compliant MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers ________________________________________________________________ maxim integrated products 1 ordering information 19-3444; rev 0; 10/04 part temp range pin-package MXL1543Bcai 0 to +70 c 28 ssop data networkingcsu and dsu data routers pci cardstelecommunications equipment t ypical operating circuit d1 d2 d3 d4 r1 r2 r3 MXL1543B rxd rxc txd txc scte d1 d2 d3 r1 r2 r3 mxl1544 max3175 cts dsr rts dtr dcd rxc brxd a (104) rxd b sg (102) shield (101) rts a (105) rts b dtr a (108) dtr b dcd a (107) dcd b dsr a (109) cts a (106) dsr bcts b ll a (141) txd bscte a (113) scte b txc a (114) txc b txd a (103) db-25 connector 13 r4 ll rxc a (115) 18 5 10 8 22 6 23 20 19 4 1 7 16 3 9 17 12 15 11 24 14 2 mxl1344a pin configuration appears at end of data sheet. for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics(v cc = +5.0v, c1 = c2 = c4 = 1?, c3 = c5 = 4.7?, (figure 10), t a = t min to t max . typical values are at t a = +25?, unless other- wise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. all voltages referenced to gnd unless otherwise noted.supply voltages v cc .......................................................................-0.3v to +6v v dd ....................................................................-0.3v to +7.3v v ee .....................................................................+0.3v to -6.5v v dd to v ee (note 1) ................................................................13v logic input voltages m0, m1, m2, dce/ dte , t_in ................................-0.3v to +6v logic output voltages r_out ....................................................-0.3v to (v cc + 0.3v) transmitter outputs t_out_, t3out_/r1in_.....................................-15v to +15v short-circuit duration............................................continuous receiver input r_in_t3out_/r1in_ ..........................................-15v to +15v r_in a to r_in b..............................-15v to 0v or 0v to +15v continuous power dissipation (t a = +70?) 28-pin ssop (derate 9.5mw/? above +70?) ...........762mw operating temperature range MXL1543Bcai .....................................................0? to 70? junction temperature .......................................................150? storage temperature range ...........................-65? to +150? lead temperature (soldering, 10s) ...............................+300? parameter symbol conditions min typ max units dc characteristics v cc operating range v cc 4.75 5.25 v rs-530, rs-530a, x.21, no load 13 rs-530, rs-530a, x.21, full load 100 130 v.35 mode, no load 20 v.35 mode, full load 126 170 v.28 mode, no load 20 v.28 mode, full load 40 75 ma supply current(dce mode) (digital inputs = gnd or v cc ) (transmitter outputs static) i cc no-cable mode 0.5 10 ? rs-530, rs-530a, x.21, full load 230 v.35 mode, full load 600 internal power dissipation(dce mode) p d v.28 mode, full load 140 mw any mode (except no-cable mode), no load 6.4 6.8 v.28 mode, with load 6.4 6.8 positive charge-pumpoutput voltage v dd v.28, v.35 modes, with load, i dd = 10ma 6.4 6.8 v v.28, v.35, no load -5.6 v.28 mode, full load -5.6 -5.4 v.35 mode, full load -5.6 -5.4 negative charge-pumpoutput voltage v ee rs-530, rs-530a, x.21, full load -5.6 -5.4 v supply rise time t r no-cable mode or power-up to turn on 500 ? logic inputs (m0, m1, m2, dce/ dte , t1in, t2in, t3in) input high voltage v ih 2.0 input low voltage v il 0.8 v t1in, t2in, t3in ?0 m0, m1, m2, dce/ dte = gnd -100 -50 -30 logic input current i in m0, m1, m2, dce/ dte = v cc 10 ? note 1: v dd and v ee absolute difference cannot exceed 13v. downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers _______________________________________________________________________________________ 3 electrical characteristics (continued)(v cc = +5.0v, c1 = c2 = c4 = 1?, c3 = c5 = 4.7?, (figure 10), t a = t min to t max . typical values are at t a = +25?, unless oth- erwise noted.) parameter symbol conditions min typ max units logic outputs (r1out, r2out, r3out) output high voltage v oh i source = 4ma 3 4.5 output low voltage v ol i sink = 4ma 0.3 0.8 v output short-circuit current i sc 0 v out v cc 50 ma output pullup current i l v out = 0, no-cable mode 70 a v.11 transmitter open-circuit differential outputvoltage v odo open circuit, r = 1.95k ? (figure 1) 5v r = 50 ? (figure 1), t a = +25 o c 0.5 ? v odo 0.67 ? v odo loaded differential outputvoltage v odl r = 50 ? (figure 1) 2 v change in magnitude of outputdifferential voltage ? v od r = 50 ? (figure 1) 0.2 v common-mode output voltage v oc r = 50 ? (figure 1) 3.0 v change in magnitude of outputcommon-mode voltage ? v oc r = 50 ? (figure 1) 0.2 v short-circuit current i sc v out = gnd 150 ma output leakage current i z -0.25v v out +0.25v, power-off or no-cable mode 1 100 a rise or fall time t r , t f (figures 2, 6) 2 10 25 ns transmitter input to outputdelay t phl , t plh (figures 2, 6) 40 80 ns data skew it phl - t plh i (figures 2, 6) 2 12 ns output to output skew t skew (figures 2, 6) 3 ns v.11 receiver differential threshold voltage v th -7v v cm 7v -200 200 mv input hysteresis ? v th -7v v cm 7v 15 40 mv receiver input current i in -10v v a, b 10v 0.66 ma receiver input resistance r in -10v v a, b 10v 15 30 k ? rise or fall time t r , t f (figures 2, 7) 15 ns receiver input to output delay t phl ,t plh (figures 2, 7) 50 80 ns data skew |t phl - t plh | (figures 2, 7) 2 16 ns v.35 transmitter open circuit (figure 3) 7 differential output voltage v od with load, -4v v cm 4v (figure 3) ?.44 ?.55 ?.66 v output high current i oh v a,b = 0 -13 -11 -9 ma output low current i ol v a,b = 0 9 11 13 ma downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 4 _______________________________________________________________________________________ parameter symbol conditions min typ max units output leakage current i z -0.25v v out +0.25v, power-off or no- cable mode 1 100 a rise or fall time t r , t f (figures 3, 6) 5 ns transmitter input to outputdelay t phl , t plh (figures 3, 6) 35 80 ns data skew |t phl ? plh | (figures 3, 6) 2 16 ns output-to-output skew t skew (figures 3, 6) 4 ns v.35 receiver differential input voltage v th -2v v cm 2v (figure 3) -200 200 mv input hysteresis ? v th -2v v cm 2v (figure 3) 15 40 mv receiver input current i in -10v v a , b 10v 0.66 ma receiver input resistance r in -10v v a , b 10v 15 30 k ? rise or fall time t r , t f (figures 3, 7) 15 ns receiver input to output delay t phl , t plh (figures 3, 7) 50 80 ns data skew |t phl ? plh | (figures 3, 7) 2 16 ns v.28 transmitter open circuit 7 output voltage swing (figure 4) v o r l = 3k ? 5 6 v short-circuit current i sc ?50 ma output leakage current i z -0.25v v out +0.25v, power-off or no- cable mode 1 100 a output slew rate sr r l = 3k ? , c l = 2500pf (figures 4, 8) 4 30 v/ s transmitter input to outputdelay t phl r l = 3k ? , c l = 2500pf (figures 4, 8) 1.5 2.5 s transmitter input to outputdelay t plh r l = 3k ? , c l = 2500pf (figures 4, 8) 1.5 3 s v.28 receiver input threshold low v il 0.8 1.2 v input threshold high v ih 1.2 2.0 v input hysteresis v hyst 0.05 0.3 v input resistance r in -15v v in +15v 3 5 7 k ? rise or fall time t r , t f (figures 5, 9) 15 ns receiver input to output delay t phl (figures 5, 9) 60 100 ns receiver input to output delay t plh (figures 5, 9) 160 250 ns electrical characteristics (continued)(v cc = +5.0v, c1 = c2 = c4 = 1?, c3 = c5 = 4.7?, (figure 10), t a = t min to t max . typical values are at t a = +25?, unless oth- erwise noted.) downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers _______________________________________________________________________________________ 5 160 0 0.1 100 1000 v.11 supply current vs. data rate 4020 60 80 100 120 140 MXL1543B toc01 data rate (kbps) supply current (ma) 10 11 0,000 dce mode, r = 50 ? , all transmitters operating at the specified data rate 0 20 6040 80 100 01 0 0 50 150 200 250 v.28 supply current vs. data rate MXL1543B toc02 data rate (kbps) supply current (ma) dce mode all transmittersoperating at the specified data rate r l = 3k ? , c l = 2500pf 160 0 0.1 100 1000 v.35 supply current vs. data rate 4020 60 80 100 120 140 MXL1543B toc03 data rate (kbps) supply current (ma) 10 0.1 10,000 dce mode, full load, all transmittersoperating at the specified data rate 180 200 -5 -2-3 -4 0 -1 43 2 1 5 010203 040506070 v.11 driver differential output voltage vs. temperature MXL1543B toc04 temperature ( c) driver differential output voltage (v) dce mode, r = 50 ? v out+ v out- 8 v.28 output voltage vs. temperature MXL1543B toc05 temperature ( c) output voltage (v) 03 0 4 0 10 20 50 60 70 10 4 6 0 2 -4 -2-8 -6 -10 dce mode, r l = 3k ? v out+ v out- -0.66 -0.22-0.44 0.22 0 0.44 0.66 03 0 4 0 10 20 50 60 70 output voltage (v) v.35 output voltage vs. temperature MXL1543B toc06 temperature ( c) dce mode, v cm = 0 full load v ol v oh 520 540530 560550 570 580 590 600 -4 -2 -1 -3 01234 v.35 differential output voltage vs. common-mode voltage MXL1543B toc07 common-mode voltage (v) differential output voltage (mv) |v od | -300 0 -100-200 100 200 300 -10 -2 -4 -8 -6 0246810 v.11/v.35 receiver input current vs. input voltage MXL1543B toc08 input voltage (v) receiver input current ( a) dce mode -0.5 1.00.5 0 1.5 2.0 2.5 -10 -2 -4 -8 -6 0246810 v.28 receiver input current vs. input voltage MXL1543B toc09 input voltage (v) receiver input current (ma) dce mode -2.0-2.5 -1.5 -1.0 t ypical operating characteristics (v cc = +5.0v, c1 = c2 = c4 =1?, c3 = c5 = 4.7?, (figure 10), t a = t min to t max , t a = +25?, unless otherwise noted.) downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 6 _______________________________________________________________________________________ 200ns/div v.11 loopback operation t in t out /r in r out 5v/div 5v/div5v/div MXL1543B toc10 r = 50 ? 1 s/div v.28 loopback operation t in t out /r in r out 5v/div 5v/div5v/div MXL1543B toc11 c l = 2500pf r l = 3k ? v.11 transmitter propagation delay vs. temperature MXL1543B toc14 0 10 3020 60 7050 40 80 propagation delay (ns) 02 0 3 0 10 40 50 60 70 temperature ( c) t plh t phl v.11 receiver propagation delay vs. temperature MXL1543B toc15 0 10 3020 60 7050 40 80 propagation delay (ns) 02 0 3 0 10 40 50 60 70 temperature ( c) t plh t phl v.35 transmitter propagation delay vs. temperature MXL1543B toc16 0 10 3020 60 7050 40 80 propagation delay (ns) 02 0 3 0 10 40 50 60 70 temperature ( c) t plh t phl v.35 receiver propagation delay vs. temperature MXL1543B toc17 0 10 3020 60 7050 40 80 propagation delay (ns) 02 0 3 0 10 40 50 60 70 temperature ( c) 90 100 t phl t plh 200ns/div v.35 loopback operation t in t out /r in r out 1v/div 5v/div5v/div MXL1543B toc12 full load 0 42 6 8 10 12 14 16 18 20 22 24 0 1000 2000 3000 4000 5000 v.28 slew rate vs. c load MXL1543B toc13 c load (pf) slew rate (v/ s) +slew -slew r l = 3k ? 1 transmitter switching at 250kbps.other transmitters switching at 15kbps t ypical operating characteristics (continued) (v cc = +5.0v, c1= c2 = c4 =1?, c3 = c5 = 4.7? (figure 10), t a = +25?, unless otherwise noted.) downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers _______________________________________________________________________________________ 7 v oc rr v od figure 1. v.11 dc test circuit c l r l v o a d figure 4. v.28 driver test circuit d a r 15pf figure 5. v.28 receiver test circuit 100pf 15pf 100pf 100 ? r b a b a d figure 2. v.11 ac test circuit v cm 15pf 50 ? 50 ? 125 ? 125 ? 50 ? 50 ? r b a b a d v od figure 3. v.35 transmitter/receiver test circuit t est circuits downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 8 _______________________________________________________________________________________ f = 1mhz: t r 10ns: t f 10ns v diff = v(a) - v(b) 1.5v 1/2 v 0 v 0 90%10% 50% t plh 5v 0 v 0 -v 0 d ab b ?a t r t skew 1.5v t phl t skew 90% 10% 50% t f figure 6. v.11, v.35 driver propagation delays v 0 -v 0 v 0h v 0l b ?a r 0 inputoutput 0 1.5v f = 1mhz: t r 10ns: t f 10ns t plh 1.5v t phl figure 7. v.11, v.35 receiver propagation delays 1.5v 0 t phl 3v 0 v 0 -v 0 d a -3v 3v t r 1.5v 0 t plh 3v -3v t r figure 8. v.28 driver propagation delays v ih v il v 0h v 0l ar 1.3v t phl 0.8v 1.7v t plh 2.4v figure 9. v.28 receiver propagation delays timing diagrams downloaded from: http:///
detailed description the MXL1543B is a three-driver/three-receiver, multipro- tocol transceiver that operates from a single +5v supply. the MXL1543B, along with the mxl1544/max3175 and mxl1344a, form a complete software-selectable dte or dce interface port that supports the v.28 (rs-232), v.10/v.11 (rs-449/v.36, eia-530, eia-530a, x.21), and v.35 protocols. the MXL1543B transceivers carry the high-speed clock and data signals, while the mxl1544/max3175 transceivers carry serial interface control signaling. the MXL1543B can be terminated by the mxl1344a software-selectable resistor termination network or by a discrete termination network. the MXL1543B features a 0.5? no-cable mode, true fail-safe operation, and thermal shutdown circuitry. thermal shut- down protects the drivers against excessive power dissi- pation. when activated, the thermal shutdown circuitry places the driver outputs into a high-impedance state. mode selection the state of the mode-select pins m0, m1, and m2determines which serial interface protocol is selected (table 1). the state of the dce/ dte input determines whether the transceiver will be configured as a dte ordce serial port. when the dce/ dte input is logic high, driver t3 is activated and receiver r1 is dis- abled. when the dce/ dte input is logic low, driver t3 is disabled and receiver r1 is activated. m0, m1, m2, MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers _______________________________________________________________________________________ 9 pin description pin name function 1 c1- capacitor c1 negative terminal. connect a 1 f ceramic capacitor between c1+ and c1-. 2 c1+ capacitor c1 positive terminal. connect a 1 f ceramic capacitor between c1+ and c1-. 3v dd generated positive supply. connect a 4.7 f ceramic capacitor to ground. 4v cc +5v supply voltage ( 5%). decouple with a 1 f capacitor to ground. 5 t1in transmitter 1 ttl-compatible input 6 t2in transmitter 2 ttl-compatible input 7 t3in transmitter 3 ttl-compatible input 8 r1out receiver 1 cmos output 9 r2out receiver 2 cmos output 10 r3out receiver 3 cmos output 11 m0 mode-select pin with internal pullup to v cc 12 m1 mode-select pin with internal pullup to v cc 13 m2 mode-select pin with internal pullup to v cc 14 dce/ dte dce/dte mode-select pin with internal pullup to v cc 15 r3inb noninverting receiver input 16 r3ina inverting receiver input 17 r2inb noninverting receiver input 18 r2ina inverting receiver input 19 t3outb/r1inb noninverting transmitter output/noninverting receiver input 20 t3outa/r1ina inverting transmitter output/inverting receiver input 21 t2outb noninverting transmitter output 22 t2outa inverting transmitter output 23 t1outb noninverting transmitter output 24 t1outa inverting transmitter output 25 gnd ground 26 v ee generated negative supply. connect a 4.7 f ceramic capacitor to ground. 27 c2- capacitor c2 negative terminal. connect a 1 f ceramic capacitor between c2+ and c2-. 28 c2+ capacitor c2 positive terminal. connect a 1 f ceramic capacitor between c2+ and c2-. downloaded from: http:///
MXL1543B and dce/ dte are internally pulled up to v cc to ensure a logic high if left unconnected. no-cable mode the MXL1543B will enter no-cable mode when themode-select pins are left unconnected or connected high (m0 = m1 = m2 = 1). in this mode, the multiproto- col drivers and receivers are disabled and the supply current drops to 0.5?. the receivers?outputs enter a high-impedance state in no-cable mode, which allow these output lines to be shared with other receivers outputs (the receivers?outputs have internal pullup resistors to pull the outputs high if not driven). also, in no-cable mode, the transmitter outputs enter a high- impedance state so that these output lines can be shared with other devices. dual charge-pump voltage converter the MXL1543B? internal power supply consists of aregulated dual charge pump that provides positive and negative output voltages from a +5v supply. the charge pump operates in discontinuous mode. if the output voltage is less than the regulated voltage, the charge pump is enabled. if the output voltage exceeds the regulated voltage, the charge pump is disabled. each charge pump requires a flying capacitor (c1, c2) and a reservoir capacitor (c3, c5) to generate the v dd and v ee supplies. figure 10 shows charge-pump con- nections. fail-safe receivers the MXL1543B guarantees a logic-high receiver outputwhen the receiver inputs are shorted or open, or when they are connected to a terminated transmission line with all the drivers disabled. this is done by setting the receivers?threshold between -25mv and -200mv in the v.11 and v.35 modes. if the differential receiver input +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 10 ______________________________________________________________________________________ MXL1543B mode name m2 m1 m0 dce/ dte t1 t2 t3 r1 r2 r3 not used (default v.11) 0000v . 1 1v . 11 z v.11 v.11 v.11 rs-530a 0 0 1 0 v.11 v.11 z v.11 v.11 v.11 rs-530 0 1 0 0 v.11 v.11 z v.11 v.11 v.11 x.21 0 1 1 0 v.11 v.11 z v.11 v.11 v.11 v.35 1 0 0 0 v.35 v.35 z v.35 v.35 v.35 rs-449/v.36 1 0 1 0 v.11 v.11 z v.11 v.11 v.11 v.28/rs-232 1 1 0 0 v.28 v.28 z v.28 v.28 v.28 no cable 1 1 1 0 z z z z z z not used (default v.11) 0001v . 1 1v . 11 v.11 z v.11 v.11 rs-530a 0 0 1 1 v.11 v.11 v.11 z v.11 v.11 rs-530 0 1 0 1 v.11 v.11 v.11 z v.11 v.11 x.21 0 1 1 1 v.11 v.11 v.11 z v.11 v.11 v.35 1 0 0 1 v.35 v.35 v.35 z v.35 v.35 rs-449/v.36 1 0 1 1 v.11 v.11 v.11 z v.11 v.11 v.28/rs-232 1 1 0 1 v.28 v.28 v.28 z v.28 v.28 no cable 1 1 1 1 z z z z z z table 1. mode selection c2- v ee c2+ MXL1543B gnd c1- 5v v cc v dd c1+ c1 1 f c54.7 f c21 f c3 4.7 f c4 1 f figure 10. charge pump downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers ______________________________________________________________________________________ 11 cts a 4 2521 18 2 1424 11 15 12 17 93 16 7 1920 23 8 10 6 22 5 13 cts b dsr adsr b dcd adcd b dtr adtr b rts arts b rxd arxd b rxc a rxc b txc atxc b scte ascte b txd atxd b charge pump dte dce rts arts b dtr a dtr b dcd adcd b dsr a dsr b cts a cts b txd atxd b scte a scte b txc atxc b rxc a rxc b rxd a rxd b sg m2 c121 f c13 1 f c54.7 f c21 f c1 1 f c41 f c34.7 f 2 21 d1d2 d3 r1r2 r3 2827 26 25 24 23 22 21 20 19 18 17 16 15 3 v cc 5v 12 4 5 6 7 8 9 1011 12 13 14 14 3 46791016 15 18 17 19 20 22 23 24 1 5 8111213 c6 100pf c7 100pf c8 100pf m1m0 dce/dte m1m2 dce/dte m0v cc v cc v cc v ee v ee v cc v dd gnd latch mxl1344a MXL1543B d1d2 d3 d4 r1r2 r3 26 27 2825 24 23 22 21 20 19 18 17 56 7 8 9 4 3 12 r4 1615 1011 12 13 nc nc 14 m1m2 dce/dte invert m0 db-25 connector mxl1544 max3175 c111 f c10 1 f c9 1 f 1 shield dte_txd/dce_rxd dte_scte/dce_rxc dte_txc/dce_txc dte_rxc/dce_scte dte_rxd/dce_txd dte_rts/dce_cts dte_dtr/dce_dsr dte_dcd/dce_dcd dte_dsr/dce_dtr dte_cts/dce_rts m1 dce/dte m0 figure 11. cable-selectable multiprotocol dte/dce port downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 12 ______________________________________________________________________________________ voltage (b - a) is -25mv, r_out is logic high. if (b - a) is -200mv, r_out is logic low. in the case of a terminated bus with all transmitters disabled, thereceiver? differential input voltage is pulled to zero by the termination. with the receiver thresholds of the MXL1543B, this results in a logic high with a 25mv minimum noise margin. applications information capacitor selection the capacitors used for the charge pumps, as well asfor supply bypassing, should have a low equivalent series resistance (esr) and low temperature coeffi- cient. multilayer ceramic capacitors with an x7r dielec- tric offer the best combination of performance, size, and cost. the flying capacitors (c1, c2) and the bypass capacitor (c4) should have a value of 1f, while the reservoir capacitors (c3, c5) should have a minimum value of 4.7? (figure 10). to reduce the rip- ple present on the transmitter outputs, capacitors c3, c4, and c5 can be increased. the values of c1 and c2 should not be increased. cable termination the mxl1344a software-selectable resistor network isdesigned to be used with the MXL1543B. the mxl1344a multiprotocol termination network provides v.11- and v.35-compliant termination, while v.28 receiver termination is internal to the MXL1543B. these cable termination networks provide compatibility with v.11, v.28, and v.35 protocols. using the mxl1344a termination networks provide the advantage of not hav- ing to build expensive termination networks out of resis- tors and relays, manually changing termination modules, or building custom termination networks cable-selectable mode a cable-selectable multiprotocol interface is shown infigure 11. the mode control lines m0, m1, and dce/ dte are wired to the db-25 connector. to select the serial interface mode, the appropriate combinationof m0, m1, and dce/ dte are grounded within the cable wiring. the control lines that are not grounded arepulled high by the internal pullups on the MXL1543B. the serial interface protocol of the MXL1543B, mxl1544/max3175, and mxl1344a is selected based on the cable that is connected to the db-25 interface. v.11 interface as shown in figure 12, the v.11 protocol is a fully bal-anced differential interface. the v.11 driver generates a minimum of ?v between nodes a and b when a 100 ? (min) resistance is presented at the load. the v.11receiver is sensitive to ?00mv differential signals at receiver inputs a?and b? the v.11 receiver rejects common-mode signals developed across the cable (referenced from c to c? of up to ?v, allowing for error-free reception in noisy environments. the receiver inputs must comply with the impedance curve shown in figure 13. for high-speed data transmission, the v.11 specifica- tion recommends terminating the cable at the receiver with a 100 ? resistor. this resistor, although not required, prevents reflections from corrupting transmit- ted data. in figure 14, the mxl1344a is used to termi- nate the v.11 receiver. internal to the mxl1344a, s1 is closed and s2 is open to present a 100 ? minimum dif- ferential resistance. the MXL1543B? internal v.28 ter-mination is disabled by opening s3. v.35 interface figure 15 shows a fully-balanced, differential standardv.35 interface. the generator and the load must both present a 100 ? ?0 ? differential impedance and a 150 ? ?5 ? common-mode impedance as shown by the resistive t networks in figure 15. the v.35 drivergenerates a current output (?1ma, typ) that develops an output voltage of ?50mv across the generator and load termination networks. the v.35 receiver is sensi- tive to ?00mv differential signals at receiver inputs a and b? the v.35 receiver rejects common-mode sig- 100 ? min a b c ab c gnd gnd generator balanced interconnecting cable cable termination receiver load figure 12. typical v.11 interface -3.25ma 3.25ma -10v +10v -3v +3v v z i z figure 13. receiver input impedance downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers ______________________________________________________________________________________ 13 r6 12k ? r85k ? r3 124 ? r252 ? r152 ? a b c ab gnd r5 12k ? r7 12k ? r4 12k ? mxl1344a MXL1543B s3 s2 s1 receiver figure 16. v.35 termination and internal resistance networks r6 12k ? r85k ? r3 124 ? r252 ? r152 ? a b c ab gnd r5 12k ? r7 12k ? r4 12k ? mxl1344a MXL1543B s3 s1 receiver s2 figure 14. v.11 termination and internal resistance networks 50 ? 50 ? 125 ? 50 ? 50 ? 125 ? a b c ab c gnd gnd generator balanced interconnecting cable cable termination receiver load figure 15. typical v.35 interface downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 14 ______________________________________________________________________________________ figure 17. typical v.28 interface a c a c gnd gnd generator unbalanced interconnecting cable cable termination receiver load r6 12k ? r85k ? r3 124 ? r252 ? r152 ? a b c ab gnd r5 12k ? r7 12k ? r4 12k ? mxl1344a MXL1543B s3 s2 s1 receiver figure 18. v.28 termination and internal resistance networks nals developed across the cable (referenced from c toc? of up to ?v, allowing for error-free reception in noisy environments. in figure 16, the mxl1344a is used to implement the resistive t network that is needed to properly terminate the v.35 driver and receiver. internal to the mxl1344a, s1 and s2 are closed to connect the t-network resis- tors to the circuit. the v.28 termination resistor (internal to the MXL1543B) is disabled by opening s3 to avoid interference with the t-network impedance. v.28 interface the v.28 interface is an unbalanced single-ended inter-face (figure 17). the v.28 driver generates a minimum of ?v across a 3k ? load impedance between a?and c? the v.28 receiver has a single-ended input. to aidin rejecting system noise, the MXL1543B? v.28 receiv- er has a typical hysteresis of 0.05v. figure 18 shows the mxl1344a? termination networkdisabled by opening s1 and s2. the MXL1543B? inter- nal 5k ? v.28 termination is enabled by closing s3. dte vs. dce operation figure 19 shows a dce or dte controller-selectableinterface. dce/ dte (pin 14) switches the port? mode of operation. see table 1. this application requires only one db-25 connector, but separate cables for dce or dte signal routing. see figure 19 for complete signal routing in dce and dte modes. complete multiprotocol x.21 interface a complete dte-to-dce interface operating in x.21mode is shown in figure 20. the MXL1543B is used to generate the clock and data signals, and the mxl1544/max3175 generate the control signals and downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers ______________________________________________________________________________________ 15 cts a 4 2 1424 11 15 12 17 93 16 7 19 20 23 8 10 6 22 5 1318 cts b dsr adsr b dcd adcd b dtr adtr b rts arts b rxd arxd b rxc a rxc b txc atxc b scte ascte b txd atxd b charge pump dte dce rts arts b dtr a dtr b dcd adcd b dsr a dsr b cts a cts b lla lla txd atxd b scte a scte b txc atxc b rxc a rxc b rxd a rxd b sg m2 c121 f c13 1 f c54.7 f c21 f c1 1 f c41 f c34.7 f 2 21 d1d2 d3 r1r2 r3 2827 26 25 24 23 22 21 20 19 18 17 16 15 3 v cc 5v 12 4 5 6 7 8 9 1011 12 13 14 14 3 46791016 15 18 17 19 20 22 23 24 1 5 8111213 c6 100pf c7 100pf c8 100pf m1m0 dce/dte m1m2 dce/dte m0v cc v cc v ee v ee v cc v dd gnd latch mxl1344a MXL1543B d1d2 d3 d4 r1r2 r3 26 27 2825 24 23 22 21 20 19 18 17 56 7 8 9 4 3 12 r4 1615 1011 12 13 14 m1m2 dce/dte invert m0 m1 m2 dce/dte m0 db-25 connector mxl1544 max3175 c111 f c10 1 f c9 1 f 1 shield dte_txd/dce_rxd dte_scte/dce_rxc dte_txc/dce_txc dte_rxc/dce_scte dte_rxd/dce_txd dte_rts/dce_cts dte_dtr/dce_dsr dte_dcd/dce_dcd dte_dsr/dce_dtr dte_cts/dce_rts dte_ll/dce_ll figure 19. multiprotocol dce/dte port downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers 16 ______________________________________________________________________________________ d1d2 d3 r3r2 r1 d1d2 d3 d4 txd scte txc rxcrxd ll d4 r4 r4 r3r2 r1 104 ? 104 ? 104 ? 104 ? 104 ? MXL1543B mxl1344a mxl1344a MXL1543B d1d2 d3 r3r2 r1 d3d2 d1 rts dtr dcd dsr cts r1r2 r3 mxl1544 max3175 mxl1544 max3175 serial controller txd scte txc rxcrxd rts dtr dcd dsr cts ll serial controller txdscte txc rxc rxd rts dtr dcd dsr cts ll dce dte figure 20. dce-to-dte x.21 interface local loopback (ll). the mxl1344a is used to termi-nate the clock and data signals to support the v.11 pro- tocol for cable termination. the control signals do not need external termination. compliance testing a european standard en 45001 test report is pendingfor the MXL1543B/mxl1544/mxl1344a chipset. a copy of the test report will be available from maxim upon completion. downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers ______________________________________________________________________________________ 17 chip information transistor count: 2619process: bicmos 2827 26 25 24 23 22 21 20 19 18 17 16 15 12 3 4 5 6 7 8 9 1011 12 13 14 c2+c2- v ee gndt1outa t1outb r3inb t2outat2outb t3outa/r1ina t3outb/r1inb r2ina r2inb r3ina dce/dte m2 m1 m0 r3out r2out r1out t3in t2in t1in v cc v dd c1+ c1- ssop top view MXL1543B pin configuration downloaded from: http:///
MXL1543B +5v multiprotocol, 3tx/3rx, software- selectable clock/data transceivers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. ssop.eps package outline, ssop, 5.3 mm 1 1 21-0056 c rev. document control no. approval proprietary information title: notes: 1. d&e do not include mold flash. 2. mold flash or protrusions not to exceed .15 mm (.006"). 3. controlling dimension: millimeters. 4. meets jedec mo150. 5. leads to be coplanar within 0.10 mm. 7.90 h l 0 0.301 0.025 8 0.311 0.037 0 7.65 0.63 8 0.95 max 5.38 millimeters b c d e e a1 dim a see variations 0.0256 bsc 0.010 0.004 0.205 0.002 0.015 0.008 0.212 0.008 inches min max 0.078 0.65 bsc 0.25 0.09 5.20 0.05 0.38 0.20 0.21 min 1.73 1.99 millimeters 6.07 6.07 10.07 8.07 7.07 inches d d d d d 0.239 0.239 0.397 0.317 0.278 min 0.249 0.249 0.407 0.328 0.289 max min 6.33 6.33 10.33 8.33 7.33 14l 16l 28l 24l 20l max n a d e a1 l c h e n 12 b 0.068 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) downloaded from: http:///

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